The present invention relates to semiconductor integrated circuits, particularly the technology of semiconductor integrated circuits in which a memory and a data-processing logic portion are integrated.
In recent years, DRAMs (dynamic random access memories) are increasingly made as macrocells, and there has been intensive integration of these with data-processing logic portions such as microprocessors and ASICs (application specific ICs), formed on a single semiconductor integrated circuit substrate. Semiconductor integrated circuits in which memory and logic portions are integrated in this way are called system LSIs.
System LSIs are known for the following two advantages. First, there are the points that they eliminate restrictions originating in a DRAM's number of pins, they can expand the data width for data input/output, and they can dramatically improve the speed of data transfer between a DRAM and a logic portion. Second, there are the points that the connection between the DRAM and the logic portion can be achieved by a short distance of metal wiring, the parasitic capacitance of the input/output wiring can be reduced remarkably, and the power consumption of the semiconductor integrated circuit can be reduced.
Furthermore, a DRAM is prepared in advance with redundant memory cells. This makes it possible to substitute a memory cell that has become defective in wafer processing with a prearranged redundant memory cell in a process of redundancy-based memory recovery. This ensures the yield in DRAM manufacture.
System LSIs are often manufactured for specific applications. Separate exposure masks are required in the manufacture of these kinds of semiconductor integrated circuits for specific applications. Moreover, semiconductor integrated circuits for specific applications have to be manufactured through various separate manufacturing processes. However, with continuous shrinking of the manufacturing processes of semiconductor integrated circuits in recent years, producing exposure masks has become very expensive. For this reason, producing separate exposure masks for each system LSI has increased manufacturing costs.
Furthermore, even though the DRAM in a conventional system LSI is prepared with redundant memory cells for substitution, the logic portion is not provided with redundant logic portions. For this reason, a logic portion that becomes defective in wafer processing cannot be recovered, and semiconductor integrated circuits that have such a defective logic portion become defective products. These kinds of reductions in yield also cause the cost of manufacturing semiconductor integrated circuits to increase.